RM7965A-900UI 900 MHz 64-bit Microprocessor Data Sheet
List of Figures
Figure 1 Block Diagram............................................................................................................. 13
Figure 2 General Purpose Registers.........................................................................................14
Figure 3 Instruction Issue Paradigm..........................................................................................15
Figure 4 Pipeline Execution Diagram........................................................................................17
Figure 5 CP0 Registers............................................................................................................. 23
Figure 6 Fast Packet Cache Mode............................................................................................34
Figure 7 Typical Embedded System Block Diagram with 64-bit SysAD Bus............................ 38
Figure 8 Processor Block Read................................................................................................. 41
Figure 9 Processor Block Write................................................................................................. 42
Figure 10 Multiple Outstanding Reads......................................................................................43
Figure 11 Clock Timing.............................................................................................................. 66
Figure 12 Input Timing............................................................................................................... 66
Figure 13 Output Timing............................................................................................................ 66
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2100294, Issue 2
8
PMC [ PMC-SIERRA, INC ]
