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PM9315-HC 参数 Datasheet PDF下载

PM9315-HC图片预览
型号: PM9315-HC
PDF下载: 下载PDF文件 查看货源
内容描述: 增强TT1 ™交换机结构 [ENHANCED TT1⑩ SWITCH FABRIC]
分类和应用: 电信集成电路电信电路
文件页数/大小: 343 页 / 5229 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PMC-Sierra, Inc.  
PM9311/2/3/5 ETT1™ CHIP SET  
Data Sheet  
PMC-2000164  
ISSUE 3  
ENHANCED TT1™ SWITCH FABRIC  
4.4.2.5 General Interrupt Register  
Symbol: XIR  
Address Offset: 00010h  
Default Value: 00000000h  
Access:  
Read only  
Interrupt Register.  
Bits  
Description  
31:3  
Reserved.  
Ready Active. This is the logical OR of the Ready Active Interrupt register, after it has been  
masked. This is set if a serial link goes from inactive to active and the corresponding mask bit is  
1. This bit is not cleared when read. You must clear the Ready Active Interrupt register.  
2
Ready Inactive. This is the logical OR of the Ready Inactive Interrupt register, after it has been  
masked. This is set if a serial link goes from active to inactive and the corresponding mask bit is  
1. This bit is not cleared when read. You must clear the Ready Inactive Interrupt register.  
1
0
CRC Error. This is the logical OR of the CRC register, after it has been masked. This is set if a  
CRC error occurs and the corresponding mask bit is 1. This bit is not cleared when read. You  
must clear the CRC Error Interrupts register.  
4.4.2.6 CRC Error Interrupts Mask  
Symbol: XCRCMSK  
Address Offset: 00014h  
Default Value: 00000000h  
Access:  
Read/Write  
Interrupt Mask for per-port CRC errors  
Bits  
Description  
CRC Error Interrupts Mask. Each bit is used to mask (enable) interrupts when the  
corresponding bit in the CRC Error Interrupts register is set to 1. The interrupt is enabled when  
the bit is 1.  
31:0  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
231  
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