RELEASED
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
Bits
Description (Continued)
Port Mode. These 2 bits select the number of ports the Crossbar is supporting. A zero value
(00) corresponds to 8 ports, a one value (01) corresponds to 16 ports, and a two value (10)
corresponds to 32 ports (the default). The number of slices per port are then given by 32/num_
2:1
ports_selected.
10 = 32 ports x 1 slice
01 = 16 ports x 2 slices
00 = 8 ports x 4 slices
Reset. Writing a 1 to this location will reset the entire device. It is equivalent to a hardware
reset. This register is cleared automatically after the device has been reset. Writing a 0 is not
necessary. Soft reset takes 1mS to complete.
0
4.4.2.3 Low Priority Mask
Symbol: XIRLMSK
Address Offset: 00008h
Default Value: 00000000h
Access:
Read/Write
Interrupt Mask for interrupts.
Bits
Description
31:3
2:0
Reserved.
Low Priority Mask. Mask bits for low priority interrupts. Each mask bit is set to 1 to enable a
low priority interrupt when the corresponding bit in the General Interrupt Register is 1.
4.4.2.4 High Priority Mask
Symbol: XIRHMSK
Address Offset: 0000Ch
Default Value: 00000000h
Access:
Read/Write
Interrupt Mask for interrupts.
Bits
Description
31:3
2:0
Reserved.
High Priority Mask. Mask bits for high priority interrupts. Each mask bit is set to 1 to enable a
high priority interrupt when the corresponding bit in the General Interrupt Register is 1.
230
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
PMC [ PMC-SIERRA, INC ]
