RELEASED
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
4.4.2.11 Link RDY Active Interrupts
Symbol: XRDYUP
Address Offset: 00028h
Default Value: 00000000h
Access:
Read and Clear
Interrupt Register for per-port RDY up signals.
NOTE: The link may be down again (inactive) by the time the CPU reads this register. Mask off
unwanted (unused ports) bits via the Link Ready Active Interrupt Mask. This register is
cleared to 0 when read.
Description
Bits
Link RDY Active Interrupts. Each bit indicates if the Ready signal from a link has
transitioned from Inactive to Active (the link has come up).
31:0
4.4.2.12 AIB Reset
Symbol:
XAIBRS
Address Offset: 00030h
Default Value: FFFFFFFFh
Access:
Read/Write
Resets AIB link for each port.
Bits
Description
AIB Reset. Each bit is used to assert reset to the AIB link for each port. Reset is asserted
when the bit is 1. If reset, the link will not operate or transition to ready. This register is set to
FFFFFFFFh on power-up reset or if the reset bit in the control register is asserted.
31:0
234
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
PMC [ PMC-SIERRA, INC ]
