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PM9315-HC 参数 Datasheet PDF下载

PM9315-HC图片预览
型号: PM9315-HC
PDF下载: 下载PDF文件 查看货源
内容描述: 增强TT1 ™交换机结构 [ENHANCED TT1⑩ SWITCH FABRIC]
分类和应用: 电信集成电路电信电路
文件页数/大小: 343 页 / 5229 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PMC-Sierra, Inc.  
PM9311/2/3/5 ETT1™ CHIP SET  
Data Sheet  
PMC-2000164  
ISSUE 3  
ENHANCED TT1™ SWITCH FABRIC  
4.4.2 Crossbar Register Descriptions  
Read and Clear means that reading the register causes it to be cleared (reset to zero).  
All bits labeled as Reserved should be set to 0.  
4.4.2.1 Status  
Symbol:  
XSTS  
Address Offset: 00000h  
Default Value: 40000000h  
Access:  
Read Only  
The top 8 bits are device_id [3:0] and revision [3:0]. OOB interrupt bits are [1:0] (high, low), all other bits  
are reserved.  
Bits  
Description  
31:28 Device ID Number. Identifies the specific device.  
27:24 Device Revision Number.  
23:2  
Reserved.  
High Priority Interrupt. 1 = There is an outstanding high priority interrupt. One of the bits in  
the General Interrupt Register is set, and is enabled via its corresponding high priority mask.  
1
Low Priority Interrupt. 1 = There is an outstanding low priority interrupt. One of the bits in the  
General Interrupt Register is set, and is enabled via its corresponding low priority mask.  
0
4.4.2.2 Control/Reset  
Symbol: XMODERS  
Address Offset: 00004h  
Default Value: 00000004h  
Access:  
Read/Write  
This register configures the number of ports supported by this Crossbar. It also resets the entire device,  
equivalent to a hardware reset.  
Bits  
Description  
31-3 Reserved.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
229