PRELIMINARY
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
Bits
Description (Continued)
Check full 16-bit CRC. For Linecard to Switch LCS headers, check a 16-bit CRC (0x11021)
over the header, if this bit is 1. If this bit is 0, check an 8-bit CRC (0x107). This applies only to
the LCS header and not to Processed Control Packet payload data.
4
Include MuxChip’s Subport ID in CRC gen. If this bit is 1, generate the Switch to Linecard
LCS header CRC including the MUX field in the grant label. If 0, generate the CRC with the
MUX field masked to 0.
3
2
1
Include MuxChip’s Subport ID in CRC check. If this bit is 1, check the Linecard to Switch
LCS header CRC including the MUX field in the request label. If 0, check the CRC with the
MUX field masked to 0.
Small System Mode. If this bit is set, only Flow Control Crossbar A is used; FC Crossbar B
is ignored. Port numbers must be even numbers. This corresponds to the Data Crossbars’
16x16 and 8x8 modes.
Reset. Writing a 1 to this location will reset the entire chip. It is equivalent to a hardware reset.
This register is cleared automatically when the chip is reset. Soft reset takes 1mS to
complete.
0
NOTE: After resetting an EPP, write 0 to offsets 0x1d000 through 0x1d7fc in that
EPP (a total of 512 OOB writes). When all EPPs are reset simultaneously
(using a broadcast OOB write to the EPP Control register), 512 broadcast
OOB writes can be used to reset those locations in all EPPs.
3.4.2.3 Low Priority Mask
Symbol: EIRLMSK
Address Offset: 00008h
Default Value: 00000000h
Access:
Read/Write
Interrupt Mask for interrupts.
Bits
Description
Low Priority Mask. Mask bits for low priority interrupts. Each mask bit is set to 1 to enable a
low priority interrupt when the corresponding bit in the Interrupt Register is 1.
31:0
3.4.2.4 High Priority Mask
Symbol: EIRHMSK
Address Offset: 0000Ch
Default Value: 00000000h
Access:
Read/Write
170
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
PMC [ PMC-SIERRA, INC ]
