PRELIMINARY
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
3.4.2.8 AIB Interrupt Register
Symbol: EAIBIR
Address Offset: 0001Ch
Default Value: 00000000h
Access:
Read and Clear
Interrupt Register
Bits
Description
31:24 Reserved.
23
22
21
20
19
18
Flow Control Crossbar A1 CRC Error
Flow Control Crossbar A0 CRC Error
Flow Control Crossbar A1 Ready Down
Flow Control Crossbar A0 Ready Down
Flow Control Crossbar A1 Ready Up
Flow Control Crossbar A0 Ready Up
Flow Control Crossbar A Both Links CRC Error. If set, neither A0 nor A1 provided valid
incremental credits during at least one celltime, so check the Invalid Incremental Credits
interrupt register to see which ports’ output queue credits need repair.
17
16
Flow Control Crossbar A Frame Mismatch. Though apparently valid, the frames received
from A0 and A1 were not identical. In this case, the Primary Flow Control Crossbar A is
selected.
15
14
13
12
11
10
Flow Control Crossbar B1 CRC Error
Flow Control Crossbar B0 CRC Error
Flow Control Crossbar B1 Ready Down
Flow Control Crossbar B0 Ready Down
Flow Control Crossbar B1 Ready Up
Flow Control Crossbar B0 Ready Up
Flow Control Crossbar B Both Links CRC Error. If set, neither B0 nor B1 provided valid
incremental credits during at least one celltime, so check the Invalid Incremental Credits
interrupt register to see which ports’ output queue credits need repair.
9
8
Flow Control Crossbar B Frame Mismatch. Though apparently valid, the frames received
from B0 and B1 were not identical. In this case the Primary Flow Control Crossbar B is
selected.
7
6
5
4
3
2
Scheduler 1 CRC Error
Scheduler 0 CRC Error
Scheduler 1 Ready Down
Scheduler 0 Ready Down
Scheduler 1 Ready Up
Scheduler 0 Ready Up
174
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE