Released
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
NOTE: There is no output queue for Control Packets. Instead, one cell location is statically
allocated for each type of outgoing Control Packet. OOB must initialize the processed CP
locations in output Dataslice queue memory before starting EPP operation.
Priority is the lower 2 bits of the traffic type for Unicast or Multicast queues; Port is 5 bits, and Subport is 2
bits. “x” is a single bit that can be 0 or 1, used to denote offsets within queues. “yy” can only be 00, 01, or
10, and is used to denote offsets within queues that are 96 cells in length.
Table 22. Output Dataslice Queue Memory Allocation
Total #
of
Queues
Type of Egress Queue
Dataslice Queue Mem
Address Mapping
Raw Address
Range
Traffic Type
Linecard
Size
0,Priority,Ingress
Port,Egress Subport,xxxx
Unicast
Unicast
OC-48c
16
64
96
96
1
512
128
4
0x0000-0x1FFF
0x0000-0x1FFF
0x2000-0x217F
0x2180-0x21DF
0x21E0
0,Priority,Ingress
Port,xxxxxx
OC-192c
OC-48c
OC-192c
Multicast
10000,yy,xxxxx,Priority
1000011,yy,xxxxx
10000111100000
10000111100010
10000111100011
10000111100100
10000111100101
OC-48c
OC-192c
TDM
1
OC-48c
OC-192c
CPU (OOB to LC) CP
LCS Stop CP
LCS Start CP
TDM Sync Sel 0 CP
TDM Sync Sel 1 CP
1
OC-48c
OC-192c
1
1
0x21E2
OC-48c
OC-192c
1
1
0x21E3
OC-48c
OC-192c
1
1
0x21E4
OC-48c
OC-192c
1
1
0x21E5
Each raw address given above is for a 48-bit word in Dataslice queue memory. In order to access the
memory with OOB, a raw address must be converted into two OOB address offsets because OOB
accesses are 32-bit. The following formula is used:
oob_offset_16_MSBs = 0x60000 | (raw_address << 3)
oob_offset_32_LSBs = 0x60000 | (raw_address << 3) | 0x4
The table below shows the data format of egress Control Packets, and the OOB address offsets within
each logical Dataslice where data must be written. The values written to shaded locations are left up to the
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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