Released
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
2.3.2 Dataslice Register Descriptions
2.3.2.1 Status
Symbol:
DSTS
Address Offset: 00000h
Default Value: 10000000h
Access:
Read Only
Status register.
Bits
Description
31:28 Device ID Number. Identifies the specific device.
27:24 Device Revision Number.
23:2
Reserved.
High Priority Interrupt. 1 = an outstanding high priority interrupt. One of the bits in the
Interrupt Register is set, and is enabled via its corresponding high priority mask.
1
Low Priority Interrupt. 1 = an outstanding low priority interrupt. One of the bits in the Interrupt
Register is set, and is enabled via its corresponding low priority mask.
0
2.3.2.2 Reset
Symbol:
DRS
Address Offset: 00004h
Default Value: 00000000h
Access:
Read/Write
Reset register.
Bits
Description
31-1 Reserved.
Reset. Writing a 1 to this location will reset the entire device. It is equivalent to a hardware
reset. This register is cleared automatically when the device is reset. Writing a 0 is not
necessary. Soft reset takes 1mS to complete.
0
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
121