Released
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
2.3.2.3 Low Priority Mask
Symbol:
DIRLMSK
Address Offset: 00008h
Default Value: 00000000h
Access:
Read/Write
Interrupt Mask for interrupts.
Bits
Description
31:24 Reserved.
Low Priority Mask. Mask bits for low priority interrupts. Each mask bit is set to 1 to enable a
low priority interrupt when the corresponding bit in the Interrupt Register is 1.
23:0
2.3.2.4 High Priority Mask
Symbol: DIRHMSK
Address Offset: 0000Ch
Default Value: 00000000h
Access:
Read/Write
Interrupt Mask for interrupts.
Bits
Description
31:24 Reserved.
High Priority Mask. Mask bits for high priority interrupts. Each mask bit is set to 1 to enable a
high priority interrupt when the corresponding bit in the General Interrupt Register is 1.
23:0
122
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
PMC [ PMC-SIERRA, INC ]
