Released
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
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Enable EPP AIB and Flow Control Crossbar AIB
Release reset on EPP AIB and Flow Control Crossbar AIB
If neighboring Scheduler cards are present:
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Reset EPP AIB and Scheduler AIB
Enable EPP AIB and Scheduler AIB
Release reset on EPP AIB and Scheduler AIB
Restore the Scheduler Control register CRC Action bit if it was set before initializing this Port
Board.
These sequences should complete with only the "ready up" interrupts enabled. When these interrupts
occur (which may be during later parts of the above sequences) then perform the following:
When DS AIB ready up:
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•
Inform local processes that the DS is operational
Enable all interrupts on DS, except for Transceiver Comma Detect and 8b10b Decoder Comma
Detect which are set every time an idle is received.
When EPP AIB ready up for at least one Scheduler and at least one set of Flow Control Crossbars:
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•
•
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Inform local processes that the EPP is operational
Enable all interrupts on EPP
Set Fault Tolerance Control
Enable Port Processor
Define 1-in-N Idle Count value
Take EPP out of LCS Stop mode
1.8.3 Scheduler Board being added:
•
•
Wait for voltage ramp-up
Suggested:
•
Initialize the OOB satellite FPGA
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
89
PMC [ PMC-SIERRA, INC ]
