Released
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
Figure 33. The Global Device Select Defines the Board Number and the Device on Each Board
Global Device Select (11b)
24 23
Sub-address (20b)
8
30
16 15
7
0
Local
Device
Select
Board address
24
23
20
30
Board type:
00 = Port
01 = Crossbar
10 = Scheduler
At power-on the ETT1 devices do not know which board they are on. They learn the board address (bits
30:24) by continuously observing the OOB bus itself: every board must have an OOB controller which
must drive the unique board address on AD[6:0] whenever VALID_L is not active. The OOB controller must
continue to do this while the system is active. Each port board (and EPP) obtains its port number by
looking at AD[4:0] when VALID_L is not active, which is why AD[6:0] must be valid whenever VALID_L is
inactive.
Each device obtains its own local device select (bits 23:20) either from static pins on the device, or through
a preset address. For the Enhanced Port Processor, Crossbar, and Scheduler devices, four dev_sel pins
(oobdev_sel[3:0]), are tied to logical 1 or 0 to provide the four least significant bits of the unique device
address. For the Dataslice device, three dev_sel pins (oobdev_sel[2:0]) are tied to logical 1 or 0 to provide
three of the four least significant bits of the unique device address. Since there are two logical Dataslices
within each package, the fourth implied bit is used to select which of the two logical Dataslices is
addressed.
80
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
PMC [ PMC-SIERRA, INC ]
