Released
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
1.10 ETT1 SIGNALS AND INTERCONNECTIONS
This section describes the different types of signals/interconnects used in a ETT1 switch core. Figure 44
shows the four types of devices required and lists the types of signals present.
Figure 44. ETT1 Signals and Interconnects
C
A
A
Dataslice 6
O
Crossbar Slice
Crossbar Slice
O
Line Coder
or FO
Xceiver
Linecard
Dataslice 0
C
H
H
H
O
A
FC Crossbar
C: LVCMOS @ 150Mb/s
EPP
H: HSTL @ 200Mb/s (Class 1 Drivers)
O: LVCMOS @ 25Mb/s
A
Scheduler
O
O
A: STI (PECL-like) @800Mb/s
O
O
Local OOB
Bus master
1.10.1 LVCMOS (C and O)
These are standard 2.5V LVCMOS I/Os (3.3V tolerant inputs). The ‘C’ signals provide the interface to the
linecoder (if present) such as a Serdes device. These are intra-board signals. The ‘O’ signals are the local
OOB bus, and operate using a local 25MHz clock. See Section 1.7 “The Out-of-Band (OOB) Bus Interface”
on page 77 for more information.
1.10.2 HSTL (H)
The HSTL signals provide the high-speed intra-board links between the EPP and the Dataslices. These
are point-to-point signals. All signals have only one driver.
These point-to-point signals carry the data between the first two Dataslice devices and the EPP. These
signals are HSTL Class 1 (50 Ohm load).
102
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
PMC [ PMC-SIERRA, INC ]
