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PM8621 参数 Datasheet PDF下载

PM8621图片预览
型号: PM8621
PDF下载: 下载PDF文件 查看货源
内容描述: NSE- 8G⑩标准产品数据表初步 [NSE-8G⑩ Standard Product Data Sheet Preliminary]
分类和应用:
文件页数/大小: 184 页 / 957 K
品牌: PMC [ PMC-SIERRA, INC ]
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NSE-8G™ Standard Product Data Sheet  
Preliminary  
°
If enabled, FRAMEI will occur every 4 frame at the internally flywheeled RC1FP  
location.  
12.9 SBI DS0 Mode Operation  
In SBI DS0 mode operation, all 9720 words of the configuration RAM are utilized. This same  
configuration is repeated four times to switch the 4-frame multiframe. In this mode, RC1FP is  
flywheeled internally every four frames so that page swaps can also occur at this frequency. A  
pulse on the OC1FP output that is used to resynchronize external TSBs also occurs every four  
frames.  
To configure this mode of operation, use the following programming steps. Note, the order in  
which these steps are followed is irrelevant.  
1. Program the DCB Frame Size register (0x4A) to 9719.  
°
This programs the DCB to use all 9720 location of the RAMs.  
2. Program the MF_SWAP bits in DCB Configuration register (0x4C) to 10.  
°
This will program the DCB to effect page changes at every 4 x 9720 frame when a page  
swap request is received.  
°
°
OC1FP will pulse high at every 4th frame.  
CMP inputs will be sampled every 4th frame at the internally flywheeled RC1FP  
location.  
°
If enabled, FRAMEI will occur every 4th frame at the internally flywheeled RC1FP  
location.  
12.10 SBI DS0 with CAS Mode Operation  
In SBI DS0 with CAS mode operation, all 9720 words of the configuration RAM are utilized.  
This same configuration is repeated 48 times to switch the 48 frame multiframe. In this mode,  
RC1FP is flywheeled internally every 48th frame so that page swaps can also occur at this  
frequency. A pulse on the OC1FP output that is used to resynchronize external TSBs also occurs  
at every 48th frame.  
To configure this mode of operation, use the following programming steps. Note, the order in  
which these steps are followed is irrelevant.  
1. Program the DCB Frame Size register (0x4A) to 9719.  
°
This programs the DCB to use all 9720 location of the RAMs.  
2. Program the MF_SWAP bits in DCB Configuration register (0x4C) to 11.  
°
°
This will program the DCB to effect page changes at every 48 x 9720 frame when a page  
swap request is received.  
OC1FP will pulse every 48th frame.  
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use  
Document ID: PMC-2010850, Issue 1  
148