NSE-8G™ Standard Product Data Sheet
Preliminary
Register 111h + N*20H, ILC Transmit Control Register
Bit
Type
Function
Unused
TX_AUX[7:0]
Reserved
TX_LINK[1:0]
Reserved
Default
X
00000000
00
00
00
0
Bit 31:16
Bit 15:8
Bit 7:6
Bit 5:4
Bit 3:2
Bit 1
R/W
R
R/W
R
R/W
R/W
TX_CRC_SWIZ_EN
TX_BYPASS
Bit 0
0
TX_BYPASS
When this bit is set to ‘1’, the blocks message transmit functions are bypassed. No messages
are inserted into the Transmit Bus data The respective signals are passed through the block’s
pipeline unmodified. Transmit message FIFO RAM is disabled and thus message data writes
are ignored.
TX_CRC_SWIZ_EN
When this bit is set to ‘1’, the calculated CRC-16 is bit reversed before being transmitted.
This facility can be used for diagnostic testing of CRC-16 generation and checking
functionality.
TX_LINK[1:0]
These bits are transmitted in the LINK bits of the message header of the next available
message. On reads these bit return the last written value.
TX_AUX[7:0]
These bits form the input to an Auxiliary channel between CPUs at each end of the link. Their
use is at the Software developers’ discretion. Data written to this register will be transmitted
in the AUX header byte of each subsequent message to the other end of the inband link. A
new value of TX_AUX will be transmitted at the next available message.
Data read from this register will be the data previously written.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010850, Issue 1
112
PMC [ PMC-SIERRA, INC ]
