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PM7385 参数 Datasheet PDF下载

PM7385图片预览
型号: PM7385
PDF下载: 下载PDF文件 查看货源
内容描述: 84 LINK , 672通道帧引擎和数据链路管理与ANY -PHY分组接口 [84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER WITH ANY-PHY PACKET INTERFACE]
分类和应用:
文件页数/大小: 244 页 / 2231 K
品牌: PMC [ PMC-SIERRA, INC ]
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PM7385 FREEDM-84A672  
DATA SHEET  
PMC-1990114  
ISSUE 6  
84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER  
WITH ANY-PHY PACKET INTERFACE  
and the 10 least significant bits of the poll address for identification of a channel.  
The TAPI672 provides three poll results for every poll address according to Table  
9. The TPAn[0] bit indicates whether or not space exists in the channel FIFO for  
data and the TPAn[1] bit indicates whether or not that polled channel FIFO is at  
risk of underflowing and should be provided data soon. The TPAn[2] bit indicates  
that an underflow event has occurred on that channel FIFO.  
Table 9 – Transmit Polling  
Poll  
TPA1[0]  
TPA1[1]  
TPA1[2]  
TPA2[0]  
TPA2[1]  
TPA2[2]  
Address  
(Full/Space)  
(Space/Starving)  
(Full/Space)  
(Space/Starving)  
(Underflow)  
(Underflow)  
Channel 0 Channel 0 Channel 0 Channel 0 Channel 1 Channel 1 Channel 1  
Channel 1 Channel 1 Channel 1 Channel 1 Channel 2 Channel 2 Channel 2  
Channel 2 Channel 2 Channel 2 Channel 2 Channel 3 Channel 3 Channel 3  
Channel 3 Channel 3 Channel 3 Channel 3 Channel 4 Channel 4 Channel 4  
Channel 4 Channel 4 Channel 4 Channel 4 Channel 5 Channel 5 Channel 5  
Channel 5 Channel 5 Channel 5 Channel 5 Channel 6 Channel 6 Channel 6  
Channel 6 Channel 6 Channel 6 Channel 6 Channel 7 Channel 7 Channel 7  
Channel 7 Channel 7 Channel 7 Channel 7 Channel 8 Channel 8 Channel 8  
Channel 8 Channel 8 Channel 8 Channel 8 Channel 9 Channel 9 Channel 9  
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
Channel  
671  
Channel  
671  
Channel  
671  
Channel Channel 0 Channel 0 Channel 0  
671  
The TAPI672 maintains a mirror image of the status of each channel FIFO in the  
partial packet buffer. The THDL672 continuously reports the status of the 672  
channel FIFOs to the TAPI672 and the TAPI672 updates the mirror image  
accordingly. The THDL672 also signals to the TAPI672 whenever an underflow  
event has occurred on a channel FIFO. At the beginning of every data transfer  
across the Tx APPI, the TAPI672 sets the mirror image status of the channel to  
“full”. Only the TAPI672 can cause the status to be set to “full” and only the  
THDL672 can cause the status to be set to “space” or “starving”. Only the  
THDL672 can cause the status to be set to “underflow” and only the TAPI672 can  
clear the “underflow” status when that channel FIFO is polled. In the event that  
both the TAPI672 and the THDL672 try to change the mirror image status of a  
particular channel simultaneously, the TAPI672 takes precedence, except for the  
“underflow” status, where the THDL672 takes precedence.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
51  
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