PM7384 FREEDM-84P672
DATA SHEET
PMC-1990445
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 84P672
Table 50 – PCI Interface (Figure 41)
Symbol
Description
Min
Max
Units
PCICLK Frequency (See Note 1)
PCICLK Duty Cycle
25
40
4
66
60
MHz
%
ns
tS
All PCI Input and Bi-directional Set-
PCI
up time to PCICLK
tH
All PCI Input and Bi-directional Hold 0.5
time to PCICLK
ns
PCI
t
t
PCICLK to all PCI Outputs Valid
2
8.5
14
ns
ns
P
PCI
PCI Output active from PCICLK to
Tristate
Z
PCI
t
All PCI Outputs Tristate from
2
ns
ZN
PCI
PCICLK to active
Notes on PCI Timing:
1. PCICLK cannot change frequency without resetting the FREEDM-84P672
device.
2. The phrase “all PCI Outputs” in the above table excludes PCIINTB and
PCICLKO.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
341
PMC [ PMC-SIERRA, INC ]
