PM7384 FREEDM-84P672
DATA SHEET
PMC-1990445
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 84P672
Figure 41 – PCI Interface Timing
PCICLK
tS
tH
PCI
PCI
PCI INPUT
tP
PCI
PCI OUTPUT
tZ
PCI
PCI TRISTATE
OUTPUT
Data Valid
tZN
PCI
PCI TRISTATE
OUTPUT
Data Valid
Table 51 – JTAG Port Interface (Figure 42)
Symbol
Description
Min
Max
Units
TCK Frequency
TCK Duty Cycle
TMS Set-up time to TCK
1
60
MHz
%
ns
40
50
tS
TMS
tH
TMS Hold time to TCK
TDI Set-up time to TCK
TDI Hold time to TCK
TCK Low to TDO Valid
50
50
50
2
ns
ns
ns
ns
TMS
tS
tH
TDI
TDI
t
60
P
TDO
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
342
PMC [ PMC-SIERRA, INC ]
