PM7384 FREEDM-84P672
DATA SHEET
PMC-1990445
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 84P672
Notes on Output Timing:
1. Output propagation delay time is the time in nanoseconds from the 1.4 Volt
point of the reference signal to the 1.4 Volt point of the output.
2. Maximum and minimum output propagation delays are measured with a 50
pF load on all the outputs except TD[2:0] which are measured with a 20 pF
load and the PCI outputs/bidirs which are measured with a 10 pF load.
Maximum propagation delay for TD[2:0] increases by typically 1 ns for each
10 pF of extra load.
3. Output tristate delay is the time in nanoseconds from the 1.4 Volt point of the
reference signal to the point where the total current delivered through the
output is less than or equal to the leakage current.
Figure 35 – SBI Frame Pulse Timing
REFCLK
tS
tH
C1FP
C1FP
C1FP
tP
C1FPOUT
C1FPOUT
Table 46 – SBI DROP BUS (Figure 36)
Symbol Description
tS
Min
Max
Units
All SBI DROP BUS Inputs Set-Up
Time to REFCLK
4
ns
SBIDROP
tH
All SBI DROP BUS Inputs Hold
1
ns
SBIDROP
Time to REFCLK
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
337
PMC [ PMC-SIERRA, INC ]
