PM7384 FREEDM-84P672
DATA SHEET
PMC-1990445
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 84P672
Register 0x044 : FREEDM-84P672 Master Tributary Loopback #6
Bit
Type
Function
Default
Bit 31
to
Unused
XXXXXXXH
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
SPE3_LBEN[28]
SPE3_LBEN[27]
SPE3_LBEN[26]
SPE3_LBEN[25]
0
0
0
0
This register controls line loopback for tributaries #25 to #28 of SPE #3.
Note
This register is not byte addressable. Writing to this register modifies all the bits
in the register. Byte selection using byte enable signals (CBEB[3:0]) are not
implemented. However, when all four byte enables are negated, no access is
made to this register.
SPE3_LBEN[28:25]:
The SPE #3 loopback enable bits (SPE3_LBEN[28:25]) control line loopback
for tributaries #28 to #25 of SPE #3 of the SBI Interface. When
SPE3_LBEN[n] is set high, the data on tributary #n output by the SBI PISO
block is looped back to the tributary #n input of the SBI SIPO block. When
SPE3_LBEN[n] is set low, transmit data for tributary #n is provided by the
TCAS block (i.e. processed normally).
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
117
PMC [ PMC-SIERRA, INC ]
