PM7384 FREEDM-84P672
DATA SHEET
PMC-1990445
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 84P672
Register 0x040 : FREEDM-84P672 Master Tributary Loopback #5
Bit
Type
Function
Default
Bit 31
to
Unused
XXXXH
Bit 16
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
SPE3_LBEN[24]
SPE3_LBEN[23]
SPE3_LBEN[22]
SPE3_LBEN[21]
SPE3_LBEN[20]
SPE3_LBEN[19]
SPE3_LBEN[18]
SPE3_LBEN[17]
SPE3_LBEN[16]
SPE3_LBEN[15]
SPE3_LBEN[14]
SPE3_LBEN[13]
SPE3_LBEN[12]
SPE3_LBEN[11]
SPE3_LBEN[10]
SPE3_LBEN[9]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
This register controls line loopback for tributaries #9 to #24 of SPE #3.
Note
This register is not byte addressable. Writing to this register modifies all the bits
in the register. Byte selection using byte enable signals (CBEB[3:0]) are not
implemented. However, when all four byte enables are negated, no access is
made to this register.
SPE3_LBEN[24:9]:
The SPE #3 loopback enable bits (SPE3_LBEN[24:9]) control line loopback
for tributaries #24 to #9 of SPE #3 of the SBI Interface. When
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
115
PMC [ PMC-SIERRA, INC ]
