RELEASED
PM7383 FREEDM-32A256
DATASHEET
PMC-2010336
ISSUE 1
FRAME ENGINE AND DATA LINK MANAGER 32A256
Register 0x018 : FREEDM-32A256 Master Line Loopback #2
Bit
Type
Function
Default
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
LLBEN[31]
LLBEN[30]
LLBEN[29]
LLBEN[28]
LLBEN[27]
LLBEN[26]
LLBEN[25]
LLBEN[24]
LLBEN[23]
LLBEN[22]
LLBEN[21]
LLBEN[20]
LLBEN[19]
LLBEN[18]
LLBEN[17]
LLBEN[16]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
This register controls line loopback for links #16 to #31.
LLBEN[31:16]:
The line loopback enable bits (LLBEN[31:16]) controls line loopback for
links #31 to #16. When links #16 through #31 are configured for channelised
T1/J1/E1 or unchannelised traffic and LLBEN[n] is set high, the data on RD[n]
is passed verbatim to TD[n] which is then updated on the falling edge of
RCLK[n]. TCLK[n] is ignored. When LLBEN[n] is set low, TD[n] is processed
normally. Line loopback is not supported for H-MVIP traffic.
PROPRIETARY AND CONFIDENTIAL
86
PMC [ PMC-SIERRA, INC ]
