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PM7383 参数 Datasheet PDF下载

PM7383图片预览
型号: PM7383
PDF下载: 下载PDF文件 查看货源
内容描述: 帧引擎和数据链路管理32A256 [FRAME ENGINE AND DATA LINK MANAGER 32A256]
分类和应用:
文件页数/大小: 231 页 / 1917 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PM7383 FREEDM-32A256  
DATASHEET  
PMC-2010336  
ISSUE 1  
FRAME ENGINE AND DATA LINK MANAGER 32A256  
RBEN:  
The receive bit error rates testing link enable bit (RBEN) controls the receive  
bit error rate testing port. When RBEN is set high, RBSEL[4:0] is a binary  
number that selects a receive link configured for non H-MVIP traffic  
(RD[31:0]/RCLK[31:0]) to be the source of data for RBD and RBCLK outputs.  
When RBEN is set low, RBD and RBCLK are held tristated.  
TBSEL[4:0]:  
The transmit bit error rates testing link select bits (TBSEL[4:0]) controls the  
over-writing of transmit data on TD[31:0] by data on TBD when transmit bit  
error rate testing is enabled (TBEN set high) and the selected link is not in  
line loopback (LLBEN[n] set low). TBSEL[4:0] is a binary number that selects  
a transmit link configured for non H-MVIP traffic (TD[31:0]/TCLK[31:0]) to  
carry the data on TBD. The TBCLK output is a buffered version of the  
selected one of TCLK[31:0]. TBSEL[4:0] is ignored when TBEN is set low.  
TBSEL[4:0] cannot select a link configured for H-MVIP traffic.  
TBEN:  
The transmit bit error rates testing link enable bit (TBEN) controls the transmit  
bit error rate testing port. When TBEN is set high and the associated link in  
not in line loopback (LLBEN set low), TBSEL[4:0] is a binary number that  
selects a transmit link data configured for non H-MVIP traffic (TD[31:0]) to  
carry the data on TBD and selects a transmit link clock (TCLK[31:0]) as the  
source of TBCLK. When TBEN is set low, all transmit links are processed  
normally and TBCLK is held tristated.  
PROPRIETARY AND CONFIDENTIAL  
89  
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