RELEASED
PM7380 FREEDM-32P672
DATA SHEET
PMC-1990262
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 32P672
PCI Offset
Register
0x004
0x008
0x00C
FREEDM-32P672 Master Interrupt Enable
FREEDM-32P672 Master Interrupt Status
FREEDM-32P672 Master Clock / Frame Pulse / BERT Activity
Monitor and Accumulation Trigger
0x010
0x014
0x018
0x01C
0x020
0x024
FREEDM-32P672 Master Link Activity Monitor
FREEDM-32P672 Master Line Loopback #1
FREEDM-32P672 Master Line Loopback #2
FREEDM-32P672 Reserved
FREEDM-32P672 Master BERT Control
FREEDM-32P672 Master Performance Monitor Control
0x028 - 0x07C Reserved
0x080
GPIC Control
0x084 - 0x0FC GPIC Reserved
0x100
0x104
0x108
0x10C
RCAS Indirect Channel and Time-slot Select
RCAS Indirect Channel Data
RCAS Framing Bit Threshold
RCAS Channel Disable
0x110 - 0x17C RCAS Reserved
0x180 – 0x1FC RCAS Link #0 through #31 Configuration
0x200
0x204
0x208
0x20C
0x210
0x214
RHDL Indirect Channel Select
RHDL Indirect Channel Data Register #1
RHDL Indirect Channel Data Register #2
RHDL Reserved
RHDL Indirect Block Select
RHDL Indirect Block Data Register
0x218 - 0x21C RHDL Reserved
0x220
0x224
RHDL Configuration
RHDL Maximum Packet Length
0x228 - 0x23C RHDL Reserved
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
85
PMC [ PMC-SIERRA, INC ]
