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PM7351-BGI 参数 Datasheet PDF下载

PM7351-BGI图片预览
型号: PM7351-BGI
PDF下载: 下载PDF文件 查看货源
内容描述: [Support Circuit, 1-Func, CMOS, PBGA304, 31 X 31 MM, 1.51 MM HEIGHT, 1.27 MM PITCH, SBGA-304]
分类和应用: ATM异步传输模式电信电信集成电路
文件页数/大小: 174 页 / 1840 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PM7351 S/UNI-VORTEX  
DATA SHEET  
PMC-1980582  
ISSUE 5  
OCTAL SERIAL LINK MULTIPLEXER  
If the cell is not the first of the message, write the Insert CRC-32 Accumulator  
register with the value stored at the end of the previous cell for the same  
control channel. This step is not necessary if the last cell inserted belonged  
to the same control channel as the current cell.  
Insertion of the CRC-32 field is done by setting the INSCRCEND bit of the  
Microprocessor Insert FIFO Control register to logic 1 prior to writing the last  
cell of the CPCS-PDU. The S/UNI-VORTEX will overwrite the data of the last  
four bytes of the cell payload written by the microprocessor with the ones  
complement of the content of the Insert CRC-32 Accumulator register.  
3. Select the Insert FIFO by writing its identification number to the INSFSEL[2:0]  
field of the Insert FIFO Control register.  
4. Write the cell contents to the Microprocessor Cell Data register. Cell data is  
entered in the format illustrated in Fig. 7.  
5. If the cell is not the last of the message, read and store the contents of the  
Insert CRC-32 accumulator register. This step is not necessary if the next cell  
to be inserted belongs to the same control channel as the current cell.  
The above sequence is repeated as needed to insert more cells. The assertion  
of a INSRDY bit of the Insert FIFO indicates that the associated FIFO is ready  
again to be written to. Setting INSRST of the Insert FIFO Control register to logic  
1 prior to writing the last cell byte allows the overwriting of the cell data.  
12.5.2 Reading Cell Data From a Control Channel  
Reading cell data from a control channel is done by manipulating the  
Microprocessor Extract FIFO Control and Microprocessor Extract FIFO Ready  
registers. The following steps are required to read a cell from one of the Extract  
FIFOs.  
1. Poll the EXTRDY[7:0] bits in the Microprocessor Extract FIFO Ready register.  
The EXTRDY[n] bit indicates the status of the FIFO receiving control channel  
cells from the RXDn+/- high speed link. Alternately, service the interrupts that  
result from setting the EXTRDYE bit in the Microprocessor Cell Buffer  
Interrupt Control and Status register.  
2. Select the Extract FIFO corresponding to the desired high speed link by  
writing its identification number to the EXTFSEL bit of the Microprocessor  
Extract FIFO Control register.  
3. Read the header of the cell to determine if it is the end of message and to  
which virtual channel it belongs.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
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