RELEASED
PM7350 S/UNI-DUPLEX
DATA SHEET
PMC-1980581
ISSUE 5
DUAL SERIAL LINK PHY MULTIPLEXER
A cell transfer will be enacted if the OADDR[4:0] value equals the state of the
OAD[4:0] bits in the Output Address Match register when the OENB is last
sampled high.
In SCI-PHY bus mode a word is prepended to the transferred ATM cell to identify
the cell’s source (i.e. a logical channel number). To retain Utopia Level 2
compatibility, the word identifying the logical channel can be placed in the
H5/UDF field. The three most significant bits of the channel number in the 8-bit
format and the 11 most significant bits of the prepend in the 16-bit format are
derived from the contents of the Extended Address Match registers, which
default to all zeros.
The SCI-PHY/Any-PHY Output Configuration register (0x14) determines the cell
format on the output bus. The cell length options for the 8 bit bus (shown in Fig.
6) are described in Table 8. 16 bit bus options (shown in Fig. 7) are described in
Table 9.
Table 8 Eight Bit SCI-PHY/Utopia Bus Slave, Output Configuration
Byte
1
Register 0x14
INADD
H5
PRE
Notes
#
bytes
52
0
2
7
UDF
0
UDF
LEN
00
N
N
N
N
0
H1-H4 only, no PHY ID is generated
Default setting. Utopia
53
N
N
N
Y
0
1
00
compatible, standard 53 byte cell,
no PHY ID
53
54
54
55
53
N
N
N
N
N
Y
Y
Y
Y
N
N
N
Y
Y
N
N
Y
N
Y
Y
0
0
0
0
1
0
1
0
1
X
01
01
10
10
00
1 user byte, H1-H4, no PHY ID
1 user byte, H1-H5, no PHY ID
2 user bytes, H1-H4, no PHY ID
2 user bytes, H1-H5, no PHY ID
Most common setting when Utopia
compatibility is desired. Standard
53 byte cell, PHY ID embedded in
H5.
54
55
N
N
Y
Y
N
Y
Y
Y
1
1
X
X
01
10
1 user byte, H1-H4, PHY ID in H5
2 user bytes, H1-H4, PHY ID in H5
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
51
PMC [ PMC-SIERRA, INC ]
