RELEASED
PM7350 S/UNI-DUPLEX
DATA SHEET
PMC-1980581
ISSUE 5
DUAL SERIAL LINK PHY MULTIPLEXER
Table 19 LVDS Link 59 Byte Cell Configurations
Far-End
Near-End
Resultant Cell contents at far-end Bus or Microprocessor
input
Reg
output
LVDS: both ends must match e.g. Reg 0x40, 0x50 and 0x60
Reg 0x14
0x0C
S
C
I
H
5
P
S
C
I
H
5
I
P
R
E
L
DEFAULT CONFIGURATION
R
E
L
N
A
D
D
U
D
F
•
•
5 system, 6 header bytes, 48 data bytes
U
D
F
U
D
F
USRHDR:
PREPEND:
CELLCRC:
6
0
0
A
N
Y
A
N
Y
E
N
[1
..
E
N
[1
..
Control cell prepend bytes 2&3 are undefined, header
bytes 8&9 are valid at far-end microprocessor.
0]
0]
1
0
1
1
1
X
1
0
0
X
0
0
1
1
0
1
1
1
0
0
X
1
0
0
0
0
•
Cells are transferred from a 53/53/54(54/54/56) byte bus
to a 53/54/54(54/56/56) byte bus.
•
•
•
•
•
H5/UDF byte(s) is (are) valid, and there is no cell
prepend other than the PHY address if Any-PHY is used.
Cells are transferred from the CSD receive port and a
53/54/54(54/56/56) byte bus.
The content of H5 is output at the far-end, UDF is
undefined if present.
X
X
Cells are transferred from a 53/53/54(54/54/56) byte bus
to the CSD transmit port.
If DHCS=0, H5 is passed transparently. If DHCS=1, it is
replaced by the calculated HCS value.
THIS CONFIGURATION IS VALID ONLY IF OMASTER=0
AND OANYPHY=0 AT THE FAR END DEVICE.
Cells are transferred from a 52/52/53(52/52/54) byte bus
to a XX/53/XX(XX/54/XX) byte bus (SCI-PHY slave
only).
•
•
Neither an address field nor a cell prepend exist. The
PHY address is contained in H5 (H5/UDF).
THIS CONFIGURATION IS VALID ONLY IF OMASTER=0
AND OANYPHY=0 AT THE FAR END DEVICE.
Cells are transferred from a 53/53/54(54/54/56) byte bus
to a XX/53/XX(XX/54/XX) byte bus (SCI-PHY slave
only).
1
0
1
0
1
1
X
X
1
1
0
0
•
•
•
Near-end H5 (H5/UDF) is stripped.
Neither an address field nor a cell prepend exist. The
PHY address is contained in H5 (H5/UDF).
THIS CONFIGURATION IS VALID ONLY IF OMASTER=0
AND OANYPHY=0 AT THE FAR END DEVICE.
Cells are transferred from the CSD receive port to a
XX/53/XX(XX/54/XX) byte bus (SCI-PHY slave only).
Neither an address field nor a cell prepend exist. The
PHY address is contained in the H5 (H5/UDF).
X
X
•
•
Table 20 LVDS Link 58 Byte Cell Configurations
Far-End
Near-End
Resultant Cell contents at far-end Bus or Microprocessor
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
188
PMC [ PMC-SIERRA, INC ]
