RELEASED
PM7350 S/UNI-DUPLEX
DATA SHEET
PMC-1980581
ISSUE 5
DUAL SERIAL LINK PHY MULTIPLEXER
Fig. 13 Output Cell (OUT_CELL)
Scan Chain Out
G1
1
EXTEST
OUTPUT or Enable
from system logic
OUTPUT or
Enable
MUX
1
IDCODE
G1
G2
SHIFT-DR
1 2
1 2 MUX
1 2
1 2
D
D
I.D. code bit
C
C
CLOCK-DR
UPDATE-DR
Scan Chain In
Fig. 14 Bidirectional Cell (IO_CELL)
Scan Chain Out
INPUT
to internal
logic
G1
EXTEST
OUTPUT from
internal logic
1
1
OUTPUT
to pin
MUX
IDCODE
G1
G2
SHIFT-DR
INPUT
1 2
1 2
1 2
1 2
from pin
D
MUX
D
C
I.D. code bit
C
CLOCK-DR
UPDATE-DR
Scan Chain In
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
180
PMC [ PMC-SIERRA, INC ]
