欢迎访问ic37.com |
会员登录 免费注册
发布采购

PM7350-PI 参数 Datasheet PDF下载

PM7350-PI图片预览
型号: PM7350-PI
PDF下载: 下载PDF文件 查看货源
内容描述: 双串行链路物理层复用器 [DUAL SERIAL LINK PHY MULTIPLEXER]
分类和应用: 复用器ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
文件页数/大小: 241 页 / 1939 K
品牌: PMC [ PMC-SIERRA, INC ]
 浏览型号PM7350-PI的Datasheet PDF文件第185页浏览型号PM7350-PI的Datasheet PDF文件第186页浏览型号PM7350-PI的Datasheet PDF文件第187页浏览型号PM7350-PI的Datasheet PDF文件第188页浏览型号PM7350-PI的Datasheet PDF文件第190页浏览型号PM7350-PI的Datasheet PDF文件第191页浏览型号PM7350-PI的Datasheet PDF文件第192页浏览型号PM7350-PI的Datasheet PDF文件第193页  
RELEASED  
PM7350 S/UNI-DUPLEX  
DATA SHEET  
PMC-1980581  
ISSUE 5  
DUAL SERIAL LINK PHY MULTIPLEXER  
11.2 JTAG Test Port  
The S/UNI-DUPLEX JTAG Test Access Port (TAP) allows access to the TAP  
controller and the 4 TAP registers: instruction, bypass, device identification and  
boundary scan. Using the TAP, device input logic levels can be read, device  
outputs can be forced, the device can be identified and the device scan path can  
be bypassed. For more details on the JTAG port, please refer to the Operations  
section.  
Instruction Register  
Length - 3 bits  
Instructions  
Selected  
Register  
Instruction  
Codes, IR[2:0]  
EXTEST  
IDCODE  
SAMPLE  
BYPASS  
BYPASS  
STCTEST  
BYPASS  
BYPASS  
Boundary Scan  
Identification  
Boundary Scan  
Bypass  
000  
001  
010  
011  
100  
101  
110  
111  
Bypass  
Boundary Scan  
Bypass  
Bypass  
Identification Register  
Length - 32 bits  
Version number - 1H  
Part Number - 7350H  
Manufacturer's identification code - 0CDH  
Device identification - 173500CDH (with CDSDIS tied to VSS).  
Length - 100 bits  
Table 18: Boundary Scan Register  
Pin/Enable Register Cell  
Enable Pin/Enable  
Register Cell  
Enable  
Bit  
0
Type  
Bit  
50  
Type  
hiz_oen  
rstob  
ENABLE  
OUT_CELL  
IO_CELL  
oavalid_lrxd_1  
oenb_lrxd_2  
ica_oen oca_lrxc_2  
IO_CELL  
IO_CELL  
IO_CELL  
octrl_oen  
octrl_oen  
oca_oen  
1
51  
52  
ica_lrxc_13  
2
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
177