RELEASED
PM7350 S/UNI DUPLEX
DATA SHEET
PMC-1980581
ISSUE 8
DUAL SERIAL LINK PHY MULTIPLEXER
Register 0x60: Transmit High-Speed Serial Configuration
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
DSCR
HSCR
0
1
X
0
0
0
1
0
Unused
R/W
R/W
R/W
R/W
R/W
DHCS
CELLCRC
PREPEND
USRHDR[1]
USRHDR[0]
This register configures the format of the cells transmitted on both the TXD1+/-
and the TXD2+/- serial links.
USRHDR[1:0]:
The USRHDR[1:0] bits determine the length of the User Header field of the
transmitted cells. The User Header defaults to six bytes.
USRHDR[1:0] Bytes in User Header
00
01
10
11
4
5
6
Reserved
PREPEND:
The PREPEND bit determines if the User Prepend field is inserted into the
transmitted cells. If PREPEND is logic 1, a two byte User Prepend is inserted
after the System Prepend field.
CELLCRC:
The CELLCRC bit determines whether the entire high-speed serial data
structure is protected by a CRC-8 code word. The PREPEND bit must be
logic 1 for this bit to have effect. If CELLCRC and PREPEND are logic 1, the
second User Prepend byte is overwritten by the CRC-8 syndrome for the
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
154
PMC [ PMC-SIERRA, INC ]
