RELEASED
PM7350 S/UNI DUPLEX
DATA SHEET
PMC-1980581
ISSUE 8
DUAL SERIAL LINK PHY MULTIPLEXER
Register 0x5E: Transmit Logical Channel FIFO Depth
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
X
X
0
0
0
0
1
0
Unused
R/W
R/W
R/W
R/W
R/W
R/W
FDEPTH[5]
FDEPTH[4]
FDEPTH[3]
FDEPTH[2]
FDEPTH[1]
FDEPTH[0]
FDEPTH[5:0]:
The FDEPTH[5:0] bits are used to set the total number of available cells per
logical channel of the Transmit FIFO. The value of FDEPTH[5:0] varies
according to the configuration of the modem interface. If the SCI-PHY
interface is used (the SCYPHY pin is set to logic 1), the FIFO Depth is to be
set to 0b000010. If the Clock Serial Data Interface is used, the FIFO depth is
to be set to 0b000100. Setting FDEPTH[5:0] to others values may cause
FIFO malfunction.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
153
PMC [ PMC-SIERRA, INC ]
