RELEASED
PM7350 S/UNI DUPLEX
DATA SHEET
PMC-1980581
ISSUE 8
DUAL SERIAL LINK PHY MULTIPLEXER
EXTCRCPR:
The EXTCRCPR bit is used to force the value of the Extract CRC-32
accumulation register to its preset value. If EXTCRCPR is set to logic 1, the
Insert CRC-32 accumulation register is kept to its preset value. If EXTCRCPR
is set to logic 0, CRC-32 verification is performed on extracted cells. The
CRC-32 calculations are performed on the bytes being read from the location
of the Microprocessor Cell Data register corresponding to the payload of
extract cells.
Due to synchronization delays, a read of the Microprocessor Cell Buffer Data
register should not be initiated until two REFCLK periods after completion of
the write of this bit.
EXTCRCCHK:
The EXTCRCCHK bit is used to enable the CRC-32 field check. Setting this
bit to logic 1 will cause the S/UNI-DUPLEX to verify if the value of the Extract
CRC-32 Accumulation register is equal to the expected CRC-32 remainder
polynomial at the end of a cell read access by the microprocessor. If
EXTCRCCHK is logic 1, the EXTCRCERRI bit will be set to logic 1 if the
CRC-32 value is incorrect.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
125
PMC [ PMC-SIERRA, INC ]
