RELEASED
PM7350 S/UNI DUPLEX
DATA SHEET
PMC-1980581
ISSUE 8
DUAL SERIAL LINK PHY MULTIPLEXER
Register 0x21: Microprocessor Insert FIFO Control
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
Unused
X
X
0
R/W
R/W
W
INSCRCEND
INSCRCPR
INSRST
1
X
X
X
X
Unused
Unused
Unused
INSRST:
The INSRST bit allows the microprocessor to abort a cell write to the Insert
FIFO. If INSRST is set to a logic 1 when previously logic 0, the extract pointer
is reset without completing the transaction. Setting INSRST after the last write
(i.e. at the beginning of the next cell) has no effect. To abort a cell, the
microprocessor must have written at least the first byte of the cell but less
than 56 bytes.
INSRST is not readable.
This bit is cleared on every write to Microprocessor Cell Data register.
INSCRCPR:
The INSCRCPR bit is used to force the value of the Insert CRC-32
accumulation register to its preset value. If INSCRCPR is set to logic 1, the
Insert CRC-32 accumulation register is kept to its preset value. If INSCRCPR
is set to logic 0, CRC-32 calculations are performed on inserted cells. CRC-
32 calculations are performed on the cell payload bytes being written to the
Microprocessor Cell Data register.
INSCRCEND:
The INSCRCEND bit is used to indicate that the following inserted cell is the
last one of the CPCS-PDU. Setting this bit to logic 1 will cause the last four
bytes of the cell transferred from the microprocessor to be replaced by the
value of the ones complement of the Insert CRC-32 Accumulation register.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
123
PMC [ PMC-SIERRA, INC ]
