RELEASED
PM7350 S/UNI DUPLEX
DATA SHEET
PMC-1980581
ISSUE 8
DUAL SERIAL LINK PHY MULTIPLEXER
address is polled, ICA remains high impedance. Similarly, PHY selection is
ignored and no cells are transferred to the S/UNI-DUPLEX when a disabled
PHY is addressed. This is typically used to allow more than one slave device
to share the cell input bus. Disabling all traffic to the SCIPHY/Any-PHY input
port is achieved by setting all ICAEN[31:0] bits to logic 0.
Setting the Input Cell Available registers to other values than the default value
may cause the device to behave erratically when the S/UNI-DUPLEX is
configured for Clocked Serial Data interface (SCIANY input is low).
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
113
PMC [ PMC-SIERRA, INC ]
