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PM7350-PGI 参数 Datasheet PDF下载

PM7350-PGI图片预览
型号: PM7350-PGI
PDF下载: 下载PDF文件 查看货源
内容描述: [Support Circuit, 1-Func, CMOS, PBGA160, 15 X 15 MM, 1.81 MM HEIGHT, PLASTIC, BGA-160]
分类和应用: ATM异步传输模式电信电信集成电路
文件页数/大小: 245 页 / 898 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PM7350 S/UNI DUPLEX  
DATA SHEET  
PMC-1980581  
ISSUE 8  
DUAL SERIAL LINK PHY MULTIPLEXER  
Register 0x15: SCI-PHY/Any-PHY Output Polling Range  
Bit  
Type  
Function  
Default  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Unused  
Unused  
X
X
X
0
0
0
0
0
Unused  
R/W  
R/W  
R/W  
R/W  
R/W  
PHYDEV[4]  
PHYDEV[3]  
PHYDEV[2]  
PHYDEV[1]  
PHYDEV[0]  
PHYDEV[4:0]:  
The PHYDEV[4:0] bits are used to define the polling range of the SCI-  
PHY/Any-PHY output port when configured as a bus master (OMASTER is  
set to logic 1). The number of PHY devices to be polled is configured as  
follows:  
PHYDEV[4:0]  
00000  
00001  
00010  
00011  
:
Description  
Poll all 32 devices  
Poll PHY#1 thru PHY#2  
Poll PHY#1 thru PHY#3  
Poll PHY#1 thru PHY#4  
:
11110  
11111  
Poll PHY#1 thru PHY#31  
Poll all 32 PHY devices  
Setting PHYDEV[4:0] to poll more PHY devices than actually connected to the  
SCI-PHY/Any-PHY output port may result in loss of cell throughput due to  
longer than necessary polling cycles  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
117  
 
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