S/UNI-IMA-4 Telecom Standard Product Data Sheet
Released
MEM_RWB
The memory indirect access control bit (MEM_RWB) selects between a configure (write)
or interrogate (read) access to the RIPP internal context RAM. Writing a logic 0 to
MEM_RWB triggers an indirect write operation. Data to be written is taken from the RIPP
Indirect Memory Data registers. Writing a logic 1 to MEM_RWB triggers an indirect read
operation. The read data can be found in the RIPP Indirect Channel Data registers
MEM_BUSY
The memory indirect access status bit (MEM_BUSY) reports the progress of an indirect
access. To trigger an indirect access, MEM_BUSY is set high when this register is written;
it stays high until the access is complete; at that point, MEM_BUSY is set low. This register
should be polled to determine either: (1) when data from an indirect read operation is
available in the Indirect Data register or (2) when a new indirect write operation may
commence.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2020889, Issue 2
151
PMC [ PMC-SIERRA, INC ]
