S/UNI-IMA-4 Telecom Standard Product Data Sheet
Released
Register 0x202: RIPP Indirect Memory Access Control
Bit
15
14
13
12:10
9:0
Type
RO
R/W
R/W
Function
MEM_BUSY
MEM_RWB
MEM_SEL
Reserved
Default
0
0
0
R/W
MEM_ADDR
0
This register controls the indirect access to the internal memory. There are two separate RAMs
used by RIPP. One is the configuration memory, which holds the configuration information for
all groups and links programmed by the microprocessor; the other is the context memory, which
stores the state context used as the working space for the RIPP internal state machine. Each of
them is 32-bits wide and contains 1024 words.
MEM_ADDR
The indirect memory address (MEM_ADDR [9:0]) indicates the memory word address to
be read or written.
The memory-address organization of the internal RAMs is shown in Table 6 and Table 7.
Table 6 RIPP Configuration Memory Address Space
Address space
0x000 – 0x03F
0x2A0 – 0x2A3
0x350 – 0x353
Description
Group configuration record area.
TX link configuration record area.
RX Link Configuration Record area.
Table 7 RIPP Context Memory Address Space
Address space
0x000 – 0x03F
0x2A0 – 0x2A7
0x350 – 0x357
Description
Group context record area.
TX link context record area.
RX link context record area.
MEM_SEL
The memory select (MEM_SEL) is used to select between the two internal RAMs. A logic
‘0’ selects the configuration memory, while a logic ‘1’ selects the context memory.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2020889, Issue 2
150
PMC [ PMC-SIERRA, INC ]
