S/UNI-IMA-4 Telecom Standard Product Data Sheet
Released
Register 0x078: LCD Count Threshold
Bit
15:8
7:0
Type
Function
Unused
LCDC[7:0]
Default
R/W
0x68
LCDC[7:0]
The LCDC[7:0] bits represent the number of consecutive cell periods the receive cell
processor must be out of cell delineation before loss of cell delineation (LCD) is declared.
Likewise, LCD is not deasserted until the receive cell processor is in cell delineation for the
number of cell periods specified by LCDC[7:0].
The default value of LCDC[7:0] is 104; this translates to 28 ms at 1.5 Mbps.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2020889, Issue 2
134
PMC [ PMC-SIERRA, INC ]
