S/UNI-IMA-4 Telecom Standard Product Data Sheet
Released
BUSY
The indirect access status bit (BUSY) reports the progress of an indirect access. BUSY is
set high when this register is written; this is done to trigger an indirect access, and will stay
high until the access is complete. At which point, BUSY will be set low. This register
should be polled to determine either: (1) when data from an indirect read operation is
available in the Indirect Data register or (2) when a new indirect write operation may
commence.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2020889, Issue 2
136