Released
Datasheet
PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATM Traffic Management Device
the Shift-DR state. Primary device outputs can be controlled by loading patterns
shifted in through input TDI into the boundary scan register using the Update-DR
state.
SAMPLE
The sample instruction samples all the device inputs and outputs. For this instruc-
tion, the boundary scan register is placed between TDI and TDO. Primary device
inputs and outputs can be sampled by loading the boundary scan register using
the Capture-DR state. The sampled values can then be viewed by shifting the
boundary scan register using the Shift-DR state.
IDCODE
The identification instruction is used to connect the identification register between
TDI and TDO. The device’s identification code can then be shifted out using the
Shift-DR state.
STCTEST
The single transport chain instruction is used to test out the TAP controller and the
boundary scan register during production test. When this instruction is the current
instruction, the boundary scan register is connected between TDI and TDO. Dur-
ing the Capture-DR state, the device identification code is loaded into the bound-
ary scan register. The code can then be shifted out on output TDO using the
Shift-DR state.
Table 47. Boundary Scan Pin Order
• Pin Type Output Enable -- controls the enable pin of 3 state drivers
• Pin Type Clock -- Observable only cell
• Pin Type Input -- Observable and controllable input cell
• Pin Type Output3 -- Bidirectional 3 state output
• Pin Type Output2 -- Three state output
Order # Pin # Pin name
Pin Type
1
2
3
4
5
6
7
8
HIZ
HIZ
HIZ
HIZ
HIZ
HIZ
HIZ
HIZ
Output enable
Output enable
Output enable
Output enable
Output enable
Output enable
Output enable
Output enable
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