S/UNI®-JET Data Sheet
Released
Register 365H: RXCP-50 LCD Count Threshold (MSB)
Bit
Type
Function
Unused
Unused
Unused
Unused
Unused
LCDC[10]
LCDC[9]
LCDC[8]
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
X
X
X
X
0
R/W
R/W
R/W
0
1
Register 366H: RXCP-50 LCD Count Threshold (LSB)
Bit
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
LCDC[7]
LCDC[6]
LCDC[5]
LCDC[4]
LCDC[3]
LCDC[2]
LCDC[1]
LCDC[0]
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
1
1
0
1
0
0
0
LCDC[10:0]
The LCDC[10:0] bits represent the number of consecutive cell periods the receive cell
processor must be out of cell delineation before loss of cell delineation (LCD) is declared.
Likewise, LCD is not de-asserted until receive cell processor is in cell delineation for the
number of cell periods specified by LCDC[10:0].
The default value of LCD[10:0] is 360, which translates to the integration periods shown in
Table 22.
Table 22 RXCP-50 LCD Integration Periods
Format Average cell period
Default LCD integration
period
DS3 Direct Mapping
DS3 PLCP
E3 G.751 Direct Mapping
E3 G.751 PLCP
E3 G.832
9.59 µs
3.45 ms
3.75 ms
4.49 ms
5.00 ms
4.50 ms
24.84 ms
99.40 ms
10.42 µs
12.46 µs
13.89 µs
12.50 µs
69.01 µs
276.00 µs
J2 Direct Mapping
DS1 Direct Mapping
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990267, Issue 3
201