S/UNI®-JET Data Sheet
Released
FERF/RAI
The FERF/RAI bit reflects the value to be inserted in the Far End Receive Failure indication
bit (bit 1 of the G.832 Maintenance and Adaptation byte), or the value of the RAI bit (bit 11
of the frame in G.751). The FERF/RAI bit is logically ORed with the LOS, OOF, AIS, and
LCD indications from the E3 FRMR and RXCP-50 when the LOSEN, OOFEN, AISEN, and
LCDEN register bits (in the S/UNI-JET Data Link and FERF/RAI Control Register) are set to
logic one respectively. When the OR of the two signals is logic one, the FERF or RAI bit in
the frame is set to logic one; when neither signal is logic one, the FERF or RAI bit is set to
logic zero.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990267, Issue 3
159
PMC [ PMC-SIERRA, INC ]
