S/UNI®-JET Data Sheet
Released
Register 341H: E3 TRAN Status and Diagnostic Options
Bit
Type
Function
Unused
PYLD&JUST
CPERR
DFERR
DLCV
Reserved
TAIS
NATUSE
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
0
0
0
0
0
0
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
NATUSE
The NATUSE bit determines the default value of the National Use bit inserted into the G.751
E3 frame overhead. The value of the NATUSE bit is logically ORed with the bit collected
once per frame from the internal HDLC transmitter (if TNETOP is set to logic one). When
TNETOP is logic zero, the NATUSE bit controls the value of the National Use bit. When
NATUSE is logic one, the National Use bit (bit 12 in G.751) is forced to logic one regardless
of the bit input from the internal HDLC transmitter or the setting of TNETOP. When
NATUSE is logic zero, the National Use bit is set to the value sampled from the internal
HDLC transmitter if TNETOP is logic zero. Otherwise, the National Use bit will be set to
logic zero. If the E3 TRAN is configured for G.832 mode, this bit is ignored.
TAIS
The TAIS bit enables AIS signal transmission. When TAIS is logic one, the all 1’s AIS signal
is transmitted. When TAIS is logic zero, the normal data is transmitted.
Reserved
The Reserved bit must be programmed to logic zero for proper operation.
DLCV
The DLCV bit selects whether a LCV is generated for diagnostic purposes. When DLCV
changes from logic zero to logic one, single LCV is generated; in HDB3, the LCV is
generated by causing a bipolar violation pulse of the same polarity to the previous bipolar
violation. To generate another LCV, the DLCV register bit must be first be written to logic
zero and then to logic one again.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990267, Issue 3
155
PMC [ PMC-SIERRA, INC ]
