S/UNI®-JET Data Sheet
Released
Register 31CH: PMON Path Parity Error Event Count LSB
Bit
Type
R
R
R
R
R
R
R
R
Function
CPERR[7]
CPERR[6]
CPERR[5]
CPERR[4]
CPERR[3]
CPERR[2]
CPERR[1]
CPERR[0]
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
X
X
X
X
X
X
X
Register 31DH: PMON Path Parity Error Event Count MSB
Bit
Type
Function
Unused
Unused
CPERR[13]
CPERR[12]
CPERR[11]
CPERR[10]
CPERR[9]
CPERR[8]
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
X
X
X
X
X
X
X
R
R
R
R
R
R
CPERR[13:0]
When configured for DS3 applications, CPERR[13:0] represents the number of DS3 path
parity errors that have been detected since the last time the DS3 path parity error counter was
polled.
This counter is forced to zero when the S/UNI-JET is configured for either J2 and E3
applications.
The counter (and all other counters in the PMON) is polled by writing to any of the PMON
register addresses (314H to 31FH) or to the S/UNI-JET Identification, Master Reset, and
Global Monitor Update Register (006H). Such a write transfers the internally accumulated
count to the CPERR Error Count Registers and simultaneously resets the internal counter to
begin a new cycle of error accumulation. This transfer and reset is carried out in a manner
that coincident events are not lost. The transfer takes 255 RCLK cycles to complete.
This counter is paused when the corresponding framer has lost frame alignment.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990267, Issue 3
120
PMC [ PMC-SIERRA, INC ]
