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PM7325-TC 参数 Datasheet PDF下载

PM7325-TC图片预览
型号: PM7325-TC
PDF下载: 下载PDF文件 查看货源
内容描述: S / UNI - ATLAS -3200电信标准产品数据表初步 [S/UNI-ATLAS-3200 Telecom Standard Product Data Sheet Preliminary]
分类和应用: ATM集成电路SONET集成电路SDH集成电路电信电路异步传输模式
文件页数/大小: 432 页 / 2222 K
品牌: PMC [ PMC-SIERRA, INC ]
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S/UNI®-ATLAS-3200 Telecom Standard Product Data Sheet  
Preliminary  
Bit  
Name  
Description  
end-to-end source point, this alarm may not indicate a problem, as a  
source point cannot expect to receive CC cells. In this case, the  
COS_FIFO_EN bit in the OAM Confiiguration register may be useful for  
suppressing these warnings.  
1
CC_segment alarm  
This bit becomes a logic 1 if no user, segment CC cell has been  
received within the last 3.5 0.5 sec. This bit is cleared upon receipt of  
a user cell, or segment CC cell. Segment CC alarms are declared only  
if the VC is part of a segment flow (Segment_Flow = 1) or is a segment  
end point (Segment_End_Point = 1)  
0
Reserved  
This bit should be set to logic 0.  
Table 11 Configuration VC Table Field  
Bit  
13  
12  
11  
Name  
Description  
Reserved  
Reserved  
Active  
This bit must be programmed to logic 0 for backwards compatibility.  
This bit must be programmed to logic 0 for backwards compatibility.  
Identifies the connection as active. This bit is checked during the  
S/UNI-ATLAS-3200 background processes to determine if the  
connection is still active. It is the responsibility of the management  
software to set and clear this bit during activation and deactivation,  
respectively, of a connection. It is recommended to set this bit to  
logic 0 until the search and linkage rows have been correctly  
configured.  
Cells received on a connection for which Active is a logic 0 will be  
dropped, with an optional copy to the Microprocessor Cell Interface  
if the InactiveToUP register bit is a logic 1. These cells will not be  
counted by the Cell Processor.  
10  
9
NNI  
When the NNI bit is logic 0, then the top four bits of the VPI are  
considered to be part of the GFC field. As such, they will not be  
used to verify the correctness of the search, and will not be  
translated unless the XGFC register bit is a logic 1.  
This bit is used to address one of two possible combinations of  
programmable cell counts. If this bit is a logic 0, the Cell Count  
1[31:0] and Cell Count 2[31:0] are programmed from the Cfg1  
settings in the Cell Counting Configuration register. If this bit is a  
logic 1, the cell counts are derived from the Cfg2 settings in Cell  
Counting Configuration.  
Count Config Select  
8
APStoUP  
When this bit is a logic 1, all Automated Protection Switching  
Coordination Protocol cells are copied to the microprocessor. If the  
APStoBCIF bit is also set to logic 1 in the Routing Configuration  
Register, then APS cells are passed to BCIF instead of the  
microprocessor. APS cells are also passed to the OCIF, unless  
S/UNI-ATLAS-3200 is an OAM flow end-point and the APStoOCIF  
bit in the Routing Configuration register is logic 0.  
7:6  
LB_Route[1:0]  
The LB_Route bits determine the handling of loopback cells.  
Regardless of the setting of LB_Route, Loopback cells are always  
dropped at flow end points unless LBtoOCIF is logic 1 in the Routing  
Configuration Register. LBtoOCIF = 1 always causes loopback cells  
to be copied to the OCIF, but does not otherwise affect the  
functionality of LB_Route.  
When LB_Route[1:0] = 00 then loopback cells will be dropped at  
flow end points, but otherwise will be routed to the OCIF. This  
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use  
Document ID: PMC-1990553, Issue 4  
82  
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