S/UNI®-ATLAS-3200 Telecom Standard Product Data Sheet
Preliminary
Bit
Name
Description
setting is intended for nodes that do not support LB functionality.
When LB_Route[1:0] = 01, then loopback cells will be automatically
looped back based on the contents of the Loopback Indication,
Source ID, and Loopback Location ID.
Cells with Loopback Indication = 0 (“Returned Loopback Cells”) will
be dropped and routed to the Microprocessor Cell Interface at
connection points whose Loopback Location ID Register matches
the Source ID of the loopback cell. At flow end points, all Returned
LB cells may be routed to the microprocessor if the
Rtd_LB_to_UP_at_End register bit is set to logic 1 in the Routing
Configuration field.
For cells with Loopback Indication = 1 (“Parent Loopback Cells”)
segment Loopback cells will be dropped and looped back if their
Loopback Location ID matches the Loopback Location ID register,
and looped back but not dropped if their Loopback Location ID is all-
zeroes. Both segment and end-to-end cells will be dropped and
looped back at flow end points if their Loopback Location ID is all-
ones, or if it matches the the Loopback Location ID register at the
end point. In any event, Loopback cells are always dropped at flow
end points. Cells which are looped back always have their
Loopback Indication bit set to 0, and have their Loopback Location
ID field replaced with the contents of the Loopback Location ID
Registers.
When Route_LB[1:0] = 10 then Loopback cells are handled the
same as if Route_LB[1:0] = 01, but instead of automatically looping
back the cells, cells are routed (without modification to Loopback
Location ID or Loopback Indication) to the Microprocessor Cell
Interface.
When Route_LB[1:0] = 11 then all loopback cells are dropped and
routed to the Microprocessor Cell Interface. When using this setting,
if the microprocessor later reinserts these cells it should set the
PROC_CELL bit to logic 0 to ensure they do not simply get routed to
the microprocessor once again.
5
4
FM_to_UP
If this bit is a logic 1, all Fault Management cells (AIS, RDI, CC) are
copied to the Microprocessor Cell Interface. The
Segment_End_Point and End_to_end_point bits determines
whether or not FM cells are output to the Output Cell Interface.
FM_to_UP does not control the routing of loopback cells, which are
controlled by the LB_ROUTE bits.
If this bit is logic 1, all cells arriving on this connection are copied to
the Backwards Cell Interface, unaltered except for the header
translation normally specified for cells being routed to OBCIF (e.g.
Xlate_to_OBCIF, OBCIF_Cell_Info, etc). If Drop_VC = 1 and
VC_to_BCIF = 1, then it is assumed that a per-VC loopback function
is being implemented, and cells from the IBCIF will be permitted to
proceed to the OCIF, and will not be sent to OBCIF. All other cells
will be sent to OBCIF, and not sent to OCIF.
VC_to_BCIF
If more cells are sent to the OBCIF than can be accommodated,
then cells can be lost due to FIFO overflow. RDI and Bwd PM cells
generated by S/UNI-ATLAS-3200 will not be lost, but Loopback cells
and cells routed via VC_to_BCIF may be lost. The OBCIF is
drained at the lesser of the opposite-direction Backward Cell
Interface Pacing rate, and the capacity of the BCIF link
(approximately 1.3 million cells per second).
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990553, Issue 4
83
PMC [ PMC-SIERRA, INC ]
