S/UNI®-ATLAS-3200 Telecom Standard Product Data Sheet
Preliminary
Register 0x10D: SRAM Data LSW (SRAM Data[31:0])
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
Default
SRAM_Data [31]
SRAM_Data [30]
SRAM_Data [29]
SRAM_Data [28]
SRAM_Data [27]
SRAM_Data [26]
SRAM_Data [25]
SRAM_Data [24]
SRAM_Data [23]
SRAM_Data [22]
SRAM_Data [21]
SRAM_Data [20]
SRAM_Data [19]
SRAM_Data [18]
SRAM_Data [17]
SRAM_Data [16]
SRAM_Data[15]
SRAM_Data[14]
SRAM_Data [13]
SRAM_Data [12]
SRAM_Data [11]
SRAM_Data [10]
SRAM_Data [9]
SRAM_Data [8]
SRAM_Data [7]
SRAM_Data [6]
SRAM_Data [5]
SRAM_Data [4]
SRAM_Data [3]
SRAM_Data [2]
SRAM_Data [1]
SRAM_Data [0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
7
6
5
4
3
2
1
0
For writes, this register contains data to be written to the lower 32 bits of the specified SRAM
entry. For reads this register contains the data that was read from the 32 LSBs of the specified
SRAM entry.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990553, Issue 4
223
PMC [ PMC-SIERRA, INC ]
