S/UNI®-ATLAS-3200 Telecom Standard Product Data Sheet
Preliminary
Register 0x10C: SRAM Access Control
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
Type
R/W
R
Function
RWB
BUSY
Default
1
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Search/Linkage
SA[16]
SA[15]
SA[14]
SA[13]
SA[12]
SA[11]
SA[10]
SA[9]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
8
7
6
5
4
3
2
1
SA[8]
SA[7]
SA[6]
SA[5]
SA[4]
SA[3]
SA[2]
SA[1]
0
SA[0]
This register allows the microprocessor to access the SRAM address indicated by SA[16:0], and
perform the operation specified by the RWB bit on either the Search Table or the Linkage Table.
Writing to this register initiates a microprocessor access request cycle.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990553, Issue 4
221
PMC [ PMC-SIERRA, INC ]
