S/UNI®-ATLAS-3200 Telecom Standard Product Data Sheet
Preliminary
11.5 Cell Processor
11.5.1 General Configuration and Status
Register 0x100: Cell Processor Configuration
Bit
31:29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
Type
Function
Unused
Default
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Copy_FwPM_Timestamp
GEN_HALFSECCLK
F4SAISF5EAIS
F4SAISF5ERDI
F4EAISF5EAIS
F4EAISF5SRDI
ForceCC
AUTO_AIS
COS_DRAM_ERR_EN
Reserved
COS_Fail_EN
COS_FAIL_ONLY
COS_EN
Sat_Fast_PM_Counts
CRO_FIFO_EN
Alternate_Count
VP_RM_PTI6
Search_Verify_En
Inact_on_DRAM_Err
SRAM_Even_Parity
Cell_Info_to_OCIF
Timeout_to_UP
Reserved
Cell_Info_to_UP
XGFC
XUDF
XHEC
XPREPO
8
7
6
5
4
3
2
1
0
XVPIVCI
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990553, Issue 4
190