S/UNI®-ATLAS-3200 Telecom Standard Product Data Sheet
Preliminary
The S/UNI-ATLAS-3200 automatically handles cell length mismatches, and will place
prepends/postpends in the appropriate locations when transmitting cells. Note that if there is only
one prepended word used in cells leaving S/UNI-ATLAS-3200, that the 1st prepended/postpended
d-word field (Word 1) would be filled with data for that prepend/postpend, and Word 2 would be
a don’t-care.
10.17.5 Reading Cells
Cells received on the Input Cell Interface or the Backward Cell Interface can be routed to the 16-
cell Microprocessor Cell Interface FIFO based on the type of cell.
Maskable interrupt statuses are generated upon the receipt of a cell and upon buffer overflow. If a
buffer overflow occurs, entire cells are lost.
Cells are written into the MCIF FIFO without header translation, as a 64-byte cell. As an option,
the prepended information can be overwritten with the PHYID, VC Record Address, and
information about the cell and connection. This information, together, is the Microprocessor Cell
Info Field and is used to interpret why the cell was routed to the microprocessor, and to provide
cell status information. The Cell_Info_to_UP bit in the Cell Processor Configuration Register
controls this function.
The Microprocessor Cell Info word has the following format:
Table 40 Microprocessor Cell Information Field
Prepend 1 [31:0]
Bits 31:13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Definition
Unused
Source[1]
Source[0]
End_to_End_Point
Segment_End_Point
TimeOut
NNI
Bit 6
VPC
Bit 5
Bit 4
OAM_Type
TYP[4]
Bit 3
TYP[3]
Bit 2
TYP[2]
Bit 1
TYP[1]
Bit 0
TYP[0]
Prepend 2 [31:0]
Bits 31:23
Bits 22:17
Bit 16
Unused
PHYID[5:0]
Reserved
Bits 15:0
VC Record Address[15:0]
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990553, Issue 4
141
PMC [ PMC-SIERRA, INC ]
